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| 74ACT574 OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT NON INVERTING s s s s s s s s s HIGH SPEED: fMAX = 250 MHz (TYP.) at VCC = 3.3V LOW POWER DISSIPATION: ICC = 8 A (MAX.) at TA = 25 oC COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN), VIL = 0.8V (MAX) 50 TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 574 IMPROVED LATCH-UP IMMUNITY B M (Plastic Package) (Micro Package) ORDER CODES : 74ACT574B 74ACT574M On the positive transition of the clock, the Q outputs will be set to logic state that were setup at the D inputs. While the (OE) input is low, the 8 outputs will be in a normal logic state (high or low logic level) and while high level the outputs will be in a high impedance state. The output control does not affect the internal operation of flip flop; that is, the old data can be retained or the new data can be entered even while the outputs are off. The device is designed to interface directly High Speed CMOS system with TTL and NMOS components. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. DESCRIPTION The ACT574 is an advanced high-speed CMOS OCTAL D-TYPE FLIP FLOP with 3 STATE OUTPUT NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power applications mantaining high speed operation similar to equivalent Bipolar Schottky TTL. These 8 bit D-Type flip-flops are controlled by a clock input (CK) and an output enable input (OE). PIN CONNECTION AND IEC LOGIC SYMBOLS April 1997 1/10 74ACT574 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1 2, 3, 4, 5, 6, 7, 8, 9 12, 13, 14, 15, 16, 17, 18, 19 11 10 20 SYMBOL OE D0 to D7 NAME AND F UNCTIO N 3 State Output Enable Input (Active LOW) Data Inputs Q0 to Q7 3 State Outputs CLOCK GND VCC Clock Input (LOW to HIGH, edge triggered) Ground (0V) Positive Supply Voltage TRUTH TABLE INPUT S OE H L L L X: DON'T CARE Z: HIGH IMPEDANCE OUT PUT S D X X L H Q Z NO CHANGE L H CK X LOGIC DIAGRAMS 2/10 74ACT574 ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 20 20 50 400 -65 to +150 300 Unit V V V mA mA mA mA o o ICC or IGND DC VCC or Ground Current C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO Top dt/dv Supply Voltage Input Voltage Output Voltage Operating Temperature: Input Rise and Fall Time VCC = 4.5 to 5.5V (note 1) Parameter Valu e 4.5 to 5.5 0 to VCC 0 to VCC -40 to +85 8 Unit V V V o C ns/V 1) VIN from 0.8 V to 2.0 V 3/10 74ACT574 DC SPECIFICATIONS Symbol Parameter V CC (V) VIH VIL VOH High Level Input Voltage Low Level Input Voltage High Level Output Voltage 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 VOL Low Level Output Voltage 4.5 5.5 4.5 5.5 II IOZ ICCT ICC IOLD IOHD Input Leakage Current 3 State Output Leakage Current Max ICC /Input Quiescent Supply Current Dynamic Output Current (note 1, 2) 5.5 5.5 5.5 5.5 5.5 V I (*) = V IH or V IL VO = 0.1 V or VCC - 0.1 V VO = 0.1 V or VCC - 0.1 V VI = V IH or V IL (*) Test Con dition s Min. 2.0 2.0 Typ. 1.5 1.5 1.5 1.5 4.4 5.4 3.86 4.86 0.001 0.001 4.49 5.49 Value T A = 25 oC Max. -40 to 85 o C Min . 2.0 2.0 0.8 0.8 4.4 5.4 3.76 4.76 0.1 0.1 0.36 0.36 0.1 0.5 0.6 8 0.1 0.1 0.44 0.44 1 5 1.5 80 75 -75 0.8 0.8 Max. Unit V V IO=-50 A IO=-50 A IO=-24 mA IO=-24 mA IO=50 A IO=50 mA IO=24 mA IO=24 mA V V VI = VCC or GND VI = VIH or VIL VO = VCC or GND VI = VCC -2.1 V VI = VCC or GND VOLD = 1.65 V max VOHD = 3.85 V min A A mA A mA mA 1) Maximum test duration 2ms, one output loaded at time 2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50 . (*) All outputs loaded. 4/10 74ACT574 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 , Input tr = t f =3 ns) Symbol Parameter V CC (V) tPLH tPHL tPZL tPZH tPLH tPHL tw ts th fMAX Propagation Delay Time CK to Q Output Enable Time Output Disable Time CK Pulse Width, HIGH or LOW Setup Time Q to CK HIGH or LOW Hold Time Q to CK HIGH or LOW Maximim Clock Frequency 5.0 5.0 (*) T est Cond ition Value T A = 25 oC -40 to 85 o C Min. Typ. Max. Min . Max. 5.0 5.5 5.0 1.5 1.0 -1.0 100 250 10.0 9.0 8.5 3.0 2.5 2.5 85 11.0 10.0 9.0 4.0 3.0 3.0 Unit ns ns ns ns ns ns MHz (*) 5.0 (*) 5.0 5.0 (*) (*) 5.0(*) 5.0 (*) (*) Voltage range is 5V 0.5V CAPACITIVE CHARACTERISTICS Symbol Parameter V CC (V) C OUT CIN C PD Output Capacitance Input Capacitance Power Dissipation Capacitance (note 1) 5.0 5.0 5.0 Test Con dition s Min. Typ. 8 4 26 Value T A = 25 oC Max. -40 to 85 o C Min . Max. pF pF pF Unit 1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD * VCC * fIN + ICC/n (per circuit) 5/10 74ACT574 TEST CIRCUIT TEST t PLH, tPHL t PZL, tPLZ t PZH, tPHZ CL = 50 pF or equivalent (includes jig and probe capacitance) RL = R1 = 500 or equivalent RT =ZOUT of pulse generator (typically 50) SWITCH Open 2VCC Open WAVEFORM 1: PROPAGATION DELAYS, SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle) 6/10 74ACT574 WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIMES (f=1MHz; 50% duty cycle) WAVEFORM 3: PULSE WIDTH 7/10 74ACT574 Plastic DIP20 (0.25) MECHANICAL DATA mm MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.34 8.5 2.54 22.86 7.1 3.93 0.130 0.053 0.254 1.39 0.45 0.25 25.4 0.335 0.100 0.900 0.280 0.155 1.65 TYP. MAX. MIN. 0.010 0.055 0.018 0.010 1.000 0.065 inch TYP. MAX. DIM. P001J 8/10 74ACT574 SO20 MECHANICAL DATA DIM. MIN. A a1 a2 b b1 C c1 D E e e3 F L M S 7.40 0.50 12.60 10.00 1.27 11.43 7.60 1.27 0.75 8 (max.) 0.291 0.19 13.00 10.65 0.35 0.23 0.50 45 (typ.) 0.496 0.393 0.050 0.450 0.299 0.050 0.029 0.512 0.419 0.10 mm TYP. MAX. 2.65 0.20 2.45 0.49 0.32 0.013 0.009 0.020 0.004 MIN. inch TYP. MAX. 0.104 0.007 0.096 0.019 0.012 P013L 9/10 74ACT574 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersede and replaces all information previously supplied. s SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. (c) 1997 SGS-THOMSON Microelectronics - Printed in Italy - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A . 10/10 |
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